Conventionally, in a DTV system LSI, reception data received via an antenna is sent to a transport decoder, in which the data is divided into various types of data (hereinafter, also called AV data) such as an audio signal (audio data), a video signal (video data) and a character signal (teletext data), and then transferred to an external memory for temporary storage. The temporarily stored data is transferred from the external memory to an AV decoder in response to a request from the AV decoder, to start AV decoding. Transfer factors between the system LSI and the external memory include write from the LSI into the external memory and read of various types of data temporarily stored by the write from the external memory to the LSI.
In the conventional system, for example, an external memory interface is provided with an arbitration device for arbitrating transfer requests from cores, and a similar arbitration device is also provided inside each core. These arbitration devices repeat predetermined operation set in advance as hardware to thereby perform data transfer to/from the external memory.
In the conventional technology described above, the transfer timing at which data required by the AV decoder is transferred from the transport decoder varies randomly depending on a data string in an input stream and the processing by the AV decoder.
Also, memory transfer in the system is performed following an arbitration order determined in advance. Therefore, there may exist a time period in which priority is not given to transfer of data to which the highest priority should be given at given timing, if any, but is given to transfer of different data. In this event, in which transfer of data to which the highest priority should be given is blocked, a memory bandwidth locally large compared with that necessary when the system is in an averaged state will be necessary for some time period, and thus the effective bandwidth will reach its peak.
For example, in the conventional DTV system, if transfer is jammed with requests output from cores, temporarily blocking transfer between the transport decoder and the external memory, input data may not be transferred from a buffer inside the transport decoder to the external memory for some time period.
During such a time period, however, the transport decoder continues receiving reception data via the antenna. When the transfer state to/from the external memory is recovered after continuation of the above situation for a given time period, transfer factors other than the sending of the reception data must have accumulated, and thus requests may not be easily accepted. Accordingly, a video signal may fail to be sent to the AV decoder and this causes irregularities in images.
When reception data is received continuously at high speed but is not transferred to the external memory, the inner buffer overflows resulting in loss of reception data. This causes loss of continuity of data required for AV decoding and thus raises a serious problem in the system.
To solve the problem described above, it may be conceived to increase the circuit scale and the number of pins in an attempt to increase the data amount transferable at one time between the transport decoder and the external memory, or to increase the operating frequency in an attempt to ensure high-speed transfer to/from the external memory. To realize this, however, measures such as changing the circuit configuration and replacing the interface with high-speed one are necessary, and this causes another problem of cost increase.
Moreover, in recent years, memory unification has been frequently adopted in which one unified external memory is shared in each block, and the interface with the external memory has been unified in many cases. In such a unified memory, one external memory is accessed in real time transfer of which predetermined rate must be always guaranteed and in non-real time transfer of which average rate only is guaranteed, and therefore, it has become difficult to make estimation for guarantee of transfer of locally required data. Further, insufficient estimation may cause an unexpected event such as transfer failure. For providing a safety net, design with a large margin which offers surplus transfer performance is necessitated for taking in consideration, as the safety net, the worst case of each transfer. However, this increases the cost. In view of this, an increase in transfer efficiency as a whole and relief from surplus performance design are expected by not transferring unnecessary one out of real time transfer always requiring a guarantee at a given rate.
In the conventional system, in which the bandwidth of the system is not managed, it is not possible to obtain in actual operation information on the state of the system in the normal operation and information on the extent to which the maximum value actually reaches when the required bandwidth locally increases. Therefore, when a problem occurs in actual operation, there is only few means of analysis for clarifying under which circumstances the problem has occurred, and this makes it difficult to re-create the state in which the problem has occurred. For this reason, it takes time to track down the cause and finds difficulty in clarifying the cause.